Analog/SerDes/PLL Design Engineers needed for positions in Phoenix, AZ, Irvine, CA, and remote.
Requirements
- Master's degree and/or PhD in Electrical Engineering or related fields
- 5+ years of experience in Analog/PLL design
- 10+ years of experience in SerDes design
- Experience in advanced CMOS design and verification flows
- Experience with analog design and verification tools
- Experience with electromagnetic simulation tools
Benefits
- Health insurance
- Retirement plan
- Paid time off
- 401k matching